Computation - the Emerging Bottleneck in Integrated Circuit Design and Manufacture

Abstract

Moore's Law describes an important trend in the history of computer hardware: that the number of transistors that can be inexpensively placed on an integrated circuit is increasing exponentially, doubling approximately every two years. The self-fulfilling prophesy of Moore's Law is under threat. The new bottleneck comes not from hardware and technology capabilities, but from control, computation, and algorithmic constraints in various steps in the design flow such as verification and optical proximity correction.

In the first part of the talk, we describe our efforts in developing a new class of wireless sensors for use in semiconductor manufacturing. These sensors are fully self-contained with on board power, communications, and signal processing electronics. The sensors offer unprecedented spatial and time resolution, making them suitable for equipment diagnostics and design, and for process optimization and control. We will illustrate the applications of these sensors in IC processing, and describe our efforts at commercializing this technology.

In the second part of the talk, will outline three very large scale computational problems that are critical to next generation ICs. These are: Inverse lithography, design verification, and design-for manufacturability. We formulate these mathematically using the common language of clip calculus and show possible solutions. We will conclude with arguing for the vital importance of computation and modeling in this economically important field.